1. Field of the Invention
The invention relates to a programming matrix for the switching of one of n logic inputs to one of j outputs.
2. Description of the Related Art
A programming matrix generally makes a selection for switching signals from one of n logic inputs to one of j lines, which are then processed further. The programming of the matrices of programmable logic is realized in various ways in practice in the case of a PLA (Programmable Logic Array). Firstly, it is possible to perform fixed programming by means of a dedicated mask during production. Furthermore, it is known to carry out one-time, but free programming by destroying integrated fuses. A third customary possibility is nonvolatile programming, which is erasable. The fourth possibility is volatile programming with data from an external storage device.
The appropriate method is selected depending on the respective tasks of the programmed logic circuit. For security reasons, fixed programming by means of a special mask is preferred for secret know-how, since the logic combinations are difficult to read out. With the special mask, either lines are laid in special mask planes to which the logic cells to be programmed are connected, or corresponding electrical connections are set during production by means of vias or plugs. However, the programming requires fabrication of specific masks and the items of information are difficult to read out and, in the case of more complex functions, can be determined only by “Reverse Engineering”. Programming errors or updates require the production of new masks and new chips, that is to say that the already finished masks and chips have to be destroyed.
One-time, free programming by destroying integrated fuses involves either creating connections which are open in the unprogrammed state (antifuse), or destroying fuses which are closed in the unprogrammed state. The connections can either forward items of information directly or drive a path transistor. Examples of this are one-time programmable PROM cells that acquire a conductive channel as a result of the programming. All lines that are possible are laid during the destruction of fuses. In a specific programming mode, built-in fuses are destroyed by thermal overloading. However, considerable current densities and relatively high voltages are required for the programming. Destroyed fuses are irreversible, that is to say the incorrectly programmed components have to be destroyed.
Nonvolatile programming, which is erasable, can be used to update firmware, even after delivery to the customer, by incorporating a new ROM. What is disadvantageous, however, is that there is no security against read-out or copying. Moreover, nonvolatile programming in an EEPROM suffers from the disadvantage that the number of programming cycles is limited and the programming speed is low. Furthermore, cells of this type require a large area.
Volatile programming with data from an external storage device likewise enables firmware to be subsequently updated. In this case, the data are loaded from an external storage device (e.g. flash memory or EEPROM) which is read when the voltage supply is switched on in a booting operation. The data of the external storage device can easily be determined or even manipulated. When the voltage supply is switched off, the programming is lost. The possible combinations are designed as a transistor cell whose channel is inhibited or enabled by the programming (path transistor). A cell having a high data transfer rate requires a relatively large amount of area and a complicated and expensive production technology. The programming can be rapidly changed after booting; however, this change cannot be provided in a simple manner during the next booting.
A considerable disadvantage of known programming matrices is that a dedicated production technology is required for each of the designs mentioned. This means that it is also necessary to define for each technology dedicated programming instructions that are neither compatible nor interchangeable across technologies.
An application of magnetoresistive elements to so-called “Floating Gate Technology” is disclosed in an article by Ranmuthu et al. (“Magneto-resistive elements—an alternative to floating gate technology” CIRCUITS AND SYSTEMS, 1992, PROCEEDINGS OF THE 35TH MIDWEST SYMPOSIUM ON WASHINGTON, DC, USA 9-12 Aug. 1992, NEW YORK, NY, USA; IEEE, US, Aug. 9, 1992, pages 134-136, XP010057781 ISBN: 0-7803-0510-8). In this case, SRAM cells which determine the signal flow are provided at crossover points of a programmable logic device. The magnetoresistive elements which are assigned to those crossover points are used to store the status of the crossover points. During booting, the switching states of the magnetoresistive elements are then transferred into the SRAM again.
A discourse on the programming of “antifuses” in fine grain architectures can be found in an article by Marple and Cooke (“Programming antifuses in Crosspoint's FPGA” CUSTOM INTEGRATED CIRCUITS CONFERENCE, 1994 SAN DIEGO, CA, USA 1-4 May 1994, NEW YORK, NY, USA, IEEE, May 1, 1994, pages 185-188, XP010129897 ISBN: 0-7803-1886-2). This describes the programming of the “antifuses” for “Programmable Logic Devices” (PLDs) and “field programmable gate arrays” (FPGAs).